1. Field of the Invention
The present invention relates to a display device and method for fabricating the same, and more particularly, to a display device including a thin film transistor and method for fabricating the same that includes an organic semiconductor layer.
2. Discussion of the Related Art
Until recently, display devices have typically used cathode-ray tubes (CRTs). Much effort has been made to study and develop various types of flat panel displays, such as liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission displays (FED), and electro-luminescence displays (ELDs), as a substitute for CRTs. In particular, these types of flat panel displays are an active matrix type display in which a plurality of pixels arranged in a matrix form are driven by a plurality of thin film transistors therein. Among the active matrix types of flat panel displays, liquid crystal display (LCD) devices and electroluminescent display (ELD) devices are widely used as monitors for notebook computers and desktop computers because of their high resolution, ability to display colors and superiority in displaying moving images.
In general, an LCD device includes two substrates that are spaced apart and face each other with a liquid crystal material interposed between the two substrates. The two substrates include electrodes that face each other such that a voltage applied between the electrodes induces an electric field across the liquid crystal material. Alignment of the liquid crystal molecules in the liquid crystal material changes in accordance with the intensity of the induced electric field in the direction of the induced electric field, thereby changing the light transmissivity of the LCD device. Thus, the LCD device displays images by varying the intensity of the induced electric field.
FIG. 1 is a perspective view of an LCD device according to the related art. As illustrated in FIG. 1, the LCD device includes a lower substrate 10, an upper substrate 20 and a liquid crystal material 30. The lower substrate 10 is referred to as an array substrate that includes a gate line 14 and a data line 16 crossing each other to define a pixel region “P”. A pixel electrode 18 and a thin film transistor “T”, which is a switching element, are positioned in each pixel region “P”. Thin film transistors “T” located adjacent to the crossings of the gate lines 14 and the data lines 16 are disposed in a matrix on the lower substrate 10. The upper substrate 20 is referred to as a color filter substrate that includes color filter patterns 26 including red (R), green (G) and blue (B) color filter patterns 26a, 26b and 26c, respectively, a black matrix 25 between the color filter patterns 26, and a common electrode 28 on both the color filter pattern 26 and the black matrix 25.
In the above related art LCD device, a hard type substrate such as a glass substrate has been used for the upper and lower substrates. In light of the fact that small-size portable display devices such as personal digital assistants (PDA) and notebook computers are presently widely used, much effort has been made to study and develop a flexible substrate such as a plastic substrate having a low weight and good flexibility. However, because fabricating the array substrate including the thin film transistors requires a high temperature of more than 200 centigrade degrees, it is difficult to use a flexible substrate for the array substrate. Accordingly, a flexible substrate is used for the color filter substrate and a hard type substrate is used for the array substrate.
In general, electrodes and lines made of a metallic material, an insulating layer, a passivation layer and the like on the array substrate can be formed at a temperature equal to or less than 200 centigrade degrees. However, when a semiconductor layer made of amorphous silicon or poly-crystalline silicon is formed at a temperature equal to or less than 200 degrees centigrade, the electrical properties of the thin film transistors on the array substrate including electric conductivity are degraded so that the thin film transistors may not function as a switching element.
To overcome the above problems, an effort is also being made to study and develop a method for fabricating a thin film transistor and an array substrate at a low temperature equal to or less than 200 centigrade degrees by using an organic semiconductor material.
The organic semiconductor material is categorized into a low molecular weight organic semiconductor material and a high molecular weight organic semiconductor material. The low molecular weight organic semiconductor material has properties better than the high molecular weight organic semiconductor material. However, because the low molecular weight organic semiconductor material is affected by a solvent such as alcohol, it is difficult to make an organic solution having the low molecular weight organic semiconductor material. Accordingly, it is difficult to use a coating method, which is easier than an evaporation method, for forming an organic semiconductor layer. Also, when the low molecular weight semiconductor layer is exposed to an etching solution including an organic solvent during a patterning process, the properties of the low molecular weight semiconductor layer are degraded.
The high molecular weight organic semiconductor material is not affected by the organic solvent and may be patterned easily. However, the properties of the high molecular weight organic semiconductor layer is not comparable to the low molecular weight organic semiconductor layer.
FIG. 2 is a cross-sectional view illustrating a molecular arrangement in a low molecular weight semiconductor layer according to the related art.
As illustrated in FIG. 2, the molecules 62 of the low molecular weight organic semiconductor layer 60 are randomly deposited by an evaporation method. Because the long axes of the molecules 62 of the low molecular weight organic semiconductor layer 60 are randomly arranged, the low molecular weight organic semiconductor layer 60 has poor properties.
Meanwhile, a high molecular weight organic semiconductor layer may be formed by a coating method. However, because the long axes of the molecules of the high molecular weight organic semiconductor layer formed by a coating method are randomly arranged, the high molecular weight organic semiconductor layer also has poor properties.
To improve such poor properties, a SAM (self aligned mono-layer) method is added during the fabricating method. For example, in the case of a bottom contact structure where the organic semiconductor layer made of the high or low molecular weight organic semiconductor material is disposed on source and drain electrodes, an OTS (octadecyltrichlorosilane) treatment and a MNB (2-mercapto-5-nitrobenzidazole) treatment are performed as part of the SAM method. The OTS treatment is performed to improve an interface property of the organic semiconductor layer and a gate insulating layer below the organic semiconductor layer, prior to forming the organic semiconductor layer. The MNB treatment is performed to improve an ohmic contact property of the organic semiconductor layer and the source and drain electrodes.
However, because the SAM method is susceptible to moisture and temperature, the electrical properties of the thin film transistors may not be uniform, thereby reducing the reliability of the array substrate. Also, the added SAM method increases the fabrication costs and time and decreases the productivity.